Architecture

Architecture

The PIC comply with the Harvard architecture: they have a program memory and
data memory separated. Most instructions occupy a word of the memory of the
program. The size of these words depends on the model of PIC, while the data
memory is organized into bytes.

The ICPs are components known as RISC (reduced instruction set computer), or
microprocessor instruction set reduced. More on reducing the number of
instructions, easier and faster is decoding, and the sooner the device operates.

An instruction cycle lasts an ICP 4 time clock. Most instructions last cycle,
except jumps that last two cycles. It will reach high speeds.

With a quartz 4MHz (or the internal clock), one obtains 1000000 cycles / second,
or, as the PIC runs almost 1 instruction per cycle, except for jumps, it gives
an output of around 1 MIPS (1 million instructions per second).

Most of the PIC can be clocked up to 20 MHz, which is a processing speed more
than honourable for a microcontroller.